电子工程专辑

CMOS集成电路性能特点及注意事项

目前数字集成电路按导电类型可分为双极型集成电路（主要为TTL）和单极型集成电路（CMOS、NMOS、PMOS等）。CMOS电路的单门静态功耗在毫微瓦（nw）数量级。 CMOS集成电路的简介 CMOS互补金属氧化物半导体，电压控制的一种放大器件。是组成CMOS数字集成电路的基本单元 ...
电子工程专辑

NMOS和PMOS在LDO的应用原理

一般工作线上性区域的电晶体，可以把它当作是一个压控电流源，去控制电路并连续检测输出电压，然后根据负载的需求，进行调节电流源，确保输出电压能够保持在期望的数值。 电流源的设计极限就出现了作用：它限定了稳压器在保持电压调节作用的情况下 ...
新浪网

使用先进的SPICE模型表征NMOS晶体管

为特定CMOS工艺节点设计的SPICE模型可以增强集成电路晶体管的模拟。了解在哪里可以找到这些模型以及如何使用它们。 本文引用地址： 我最近写了一系列关于CMOS反相器功耗的文章。该系列中的模拟采用了LTspice库中预加载的nmos4和pmos4模型。虽然这种方法完全 ...
EDN

Power dissipation in portables: Design considerations using low-power CMOS ICs

When a CMOS circuit is in an idle state there is still some static power dissipation–a result of leakage current through nominally off transistors. Both nMOS and pMOS transistors used in CMOS logic ...
Electronic Design

Dirt Cheap ASIC Design for Dummies (Part 3): NMOS, PMOS Silicon Design Using a Web Browser

Quickly learn what the difference is between PMOS and NMOS transistors in their structure and operation, and how CMOS works with the two in combination. Siliwiz, a free, browser-based, ASIC layout ...
EDN

Models for high-voltage transistors in a standard CMOS process

Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...
Electronic Design

Use Hybrid PMOS-NMOS Active Loads To Cut Substrate Noise In Differential Amplifiers

PMOS transistors are less vulnerable to substrate noise since they’re placed in separate wells; designers implement guard rings to attenuate the substrate noise propagation. However, substrate noise ...