电子工程专辑

利用串行RapidIO实现FPGA协处理

本文解释了串行RapidIO的基本原理，它与其他互连总线相比的优势，以及如何利用它在FPGA中实现DSP协处理。文章最后介绍了Xilinx公司串行RapidIO方案的一些特点。这些方案不仅能够满足传统DSP应用对功耗、性能和带宽的要求，而且可以大大节约系统总体成本 ...
Design-Reuse

Xilinx Ships Industry's Only Complete RapidIO Solution For Virtex-II Pro Series FPGAs

Accelerates adoption of RapidIO protocol into wide range of applications including ATCA Backplanes and Wireless Infrastructure DALLAS, Texas, April 26, 2004 - At the Motorola Smart Network Developer ...
EDN

Using Serial RapidIO for FPGA co-processing

For more on Serial RapidIO, see The RapidIO High-Speed Interconnect: A Technical Overview, Easy multiprocessor design with sRIO and MSGQ, and Partitioning video across multiple DSPs and FPGAs. Today's ...
EDN

Xilinx preps RapidIO cores for FPGA family

SAN MATEO, Calif. — Xilinx Inc. has introduced RapidIO cores for its latest FPGAs with embedded PowerPC processors, a move that will give designers an early crack at developing embedded systems with ...
Design-Reuse

Xilinx and Agilent Technologies Demonstrate World's First PowerPC with RapidIO Interface

BOSTON, ESC Boston 2002, Nov. 19, 2002 - Xilinx, Inc. (Nasdaq:XLNX) and Agilent Technologies, Inc. (NYSE:A) today announced that the companies will demonstrate the world's first PowerPC processor with ...